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AK4964Z 7YYTR SG5DA57 7C34098A KNP2WS SML60T38 3Z5UU 2SA1288
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   test and measurement products www.semtech.com spi and qspi and trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. dhi de n dhi de n qa ch 0 serial io qb qa qb a b cv b cv b cv a dv l dv h c o n t r o l vfrc ifrc test h test l cl h cl l pm u ivmo n 0 gnd_ sn s ivmon_hi ivmo n 1 ivmo n 0 pmuf dv t vc h vc l dutio[0] dutio[1] pmu s pm u ivmon_lo a/ d a/ d pm u isc vcm isk is c vcm is k cv a cv b dv l dv h test l test h ifrc vfrc cl l cl h dv t vc l vc h pmuf pmu s ivmon 1 ch 1 description revision 6, november 2, 2007 preliminary E8415A 1ghz dual channel, digitally programmed pin electronics solution functional block diagram applications features the E8415A has a driver and window comparator receiver and commutating load circuit for each channel. also present is a pmu per channel that also doubles as a resistive load function to the dut. each pmu has a 16-bit adc for analog parametric measurements. all levels dacs for the driver, receiver, load and pmu are on-chip and are programmed via a high speed serial bus. each of the levels dacs have offset and gain registers for on-chip calibrations. the driver circuit is capable of forcing two levels to the dut (dvh and dvl) as well as a third voltage for a termination level (dvt) to terminate high-speed dut signals to the com - parator receivers into a high quality 50 ? load. the driver can also be confgured to a high impedance (hiz) state for an open termination of dut signals. waveform clamps are also available to clip the input signals from a dut when not using the driver as a termination. the clamps prevent refections from returning to the dut transmission line which can create timing errors and false triggering. all of the on-chip dac levels and confguration registers for each channel may be programmed via set commands. this pincast method of programming allows all channels in a system to be programmed concurrently with a simple set command whereby any pin channel that had been assigned to that set will respond. the two driver circuits may be placed into a differential drive mode. this reduces driver-to-driver skews to levels diffcult to achieve by external deskewing. the two window comparators may also be placed into a differential receive mode. these features enable higher quality testing of differential signals to/from the dut. ? two fully integrated pin channels including: - 16-bit dacs for each level - tri-level driver - window receiver - 4ma/40ma ranged, active commutating load - parametric measurement unit - thevinen load - waveform clamps - 16-bit adc for pmu measurements ? driver, comparator and pmu maximum 8v span over -2 to +7v range ? confgurable output protection ? 4 pmu current ranges; 24ma, 2.4ma, 240a, 24a ? on-chip adc for each pmu ? 50mhz serial bus programming - spi?/qspi?/ microwire? - daisy-chainable ? power dissipation ~1.5w/channel, quiescent (i/o mode) ? pin and software compatible to e8400, e8410, e8405 ? differential drive and receive functionality ? optimal small swing performance ? small 11mm x 11mm package ? logic testers ? mixed-signal test equipment ? memory testers ? flash memory testers ? asic verifers


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